Submit | All submissions | Best solutions | Back to list |
ICODER - Instruction Decoder |
Mathews uses a brand new 16-bit instruction processor. (Yeah i am being sarcastic!). It has one register (say R) and it supports two instructions:
- ADD X; Impact: R = (R + X) mod 65536
- MUL X; Impact: R = (R * X) mod 65536
- [For both instructions 0 <= X <= 65535]
Input Format:
The input file consists of multiple testcases.
The first line of each testcase contains one integer, N. (1 <= N <= 100,000).
The following N lines contain one instructions each.
Input terminates with a line containing N=0, which must not be processed.
Output Format:
For each testcase print one integer in a single line, denoting the number of different values the register can take after code execution.
Sample Input:
1 ADD 3 1 MUL 0 5 MUL 3 ADD 4 MUL 5 ADD 3 MUL 2 8 ADD 32 MUL 5312 ADD 7 MUL 7 ADD 32 MUL 5312 ADD 7 MUL 7 0Sample Output:
65536 1 32768 16
Added by: | Prasanna |
Date: | 2007-10-08 |
Time limit: | 1s |
Source limit: | 50000B |
Memory limit: | 1536MB |
Cluster: | Cube (Intel G860) |
Languages: | ADA95 ASM32 BASH BF C CSHARP CPP C99 CLPS LISP sbcl LISP clisp D FORTRAN HASK ICON ICK JAVA LUA NEM NICE OCAML PAS-GPC PAS-FPC PERL PHP PIKE PRLG-swi PYTHON RUBY SCM guile SCM qobi ST TEXT WHITESPACE |
Resource: | NITT ACM ICPC Local Contest 2007 [Self] |